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SIGDA's CADathlon at ICCAD

Sunday, Nov. 1, 2009
8 am - 5 pm
Double Tree Hotel
San Jose, CA
cadathlon

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Winners!!

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Problems

Contest
Guidelines

Participants

Important
Dates

Organizing
Committee

CADathlon 2008


  Sponsored by SIGDA
 
SIGDA Liaison
Asst. Prof.
Matthew Guthaus

Problems and References

To download the tar.gz file for all related papers, click here.

Problem 1: Analysis & Circuit Design

Contributed by: Michael Moffitt, IBM Austin Research Labs

Overview: Yield Analysis of SRAMs
A Radial Exploration Approach to Manufacturing Yield Estimation and Design Centering,
Kirpal S. Tahim and Robert Spence, IEEE Transactions on Circuits and Systems, Vol. CAS-26, No. 9, September 1979.

Problem 2: Physical Design

Contributed by: Cliff Sze, IBM Austin Research Labs

Overview: Clock distribution for high-performance chips
Sizing of clock distribution networks for high performance CPU chips,
M. Desai, R. Cvijetic, and J. Jensen, In Proceedings of the ACM/IEEE Design Automation Conference, pages 389-394, June 1996.

Problem 3: Logic & High-Level Synthesis

Contributed by: Smita Krishnaswamy, IBM Yorktown Heights

Overview: SAT based functional decomposition
Scalable exploration of functional dependency by interpolation and incremental SAT solving,
C. Lee, J. R. Jiang, C. Huang, and A. Mishchenko, ICCAD 2007, pp. 227-233.

Problem 4: System Design and Analysis

Contributed by: Sudarshan Banarjee, Denali

Overview: Integer Linear Programming (ILP) formulation for memory partitioning and data allocation.
An Integer Linear Programming Based Approach to Simultaneous Memory Space Partitioning and Data Allocation for Chip Multiprocessors,
O. Ozturk, G. Chen, M. Kandemir and M. Karakoy, Proc. ISVLSI 2006.

Problem 5: Functional Verification

Contributed by: Hao Zheng, University of South Florida

Overview: SAT based safety checking of sequential circuits
Symbolic Model checking without BDDs,
A. Biere, A. Cimatti, E. M. Clarke, and Y. Zhu, TACAS '99: Proceedings of the 5th International Conference on Tools and Algorithms for Construction and Analysis of Systems, 1999, pp. 193-207.
The AIGER And-Inverter Graph (AIG) Format , Version 20070427,
A. Biere, Johannes Kepler University, 2006-2007.

Problem 6: Bio EDA

Contributed by: Marc Riedel, University of Minnesota

Overview: Stochastic Simulation of Chemical Kinetics
Stochastic Simulation of Chemical Kinetics,
Daniel T. Gillespie, Annu. Rev. Phys. Chem. 2007. 58:35-55.

Computer Platform

During the contest one desktop computer will be available per team. This will be a Dell Optiplex 745 Pentium D (3.4Ghz) running a standard installation of CentOS Linux 5.x. All necessary software and the problem statements will be pre-installed. In your home directory you will find a beginning directory structure to organize your work and initial problem frameworks such as parsers.

One or more of the problems may require solving linear programs or satisfiability problems. For this, we will provide lp_solve and MiniSat and recommend familiarizing yourself with them. Of course, you are also welcome to program your own solvers.

You will be allowed to bring in any written or printed materials, but no electronic storage media or computing devices. (If you have a preferred VIM or Emacs configuration, you will need to print them out beforehand and type them in.) Whatever you bring in shall stay in the room until you decide to leave the room at the end of the day.

You will not have any internet or phone access during the competition, and you are expected not to discuss any questions with colleagues other than your team member.
CADathlon 2009 is over. Congratulations to the winners!