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Total: 169
Y. Yabe, Y. Aimoto, M. Motomura, T. Takizawa, T. Miyamoto, T. Iwasaki, Y. Nakazawa, T. Fujii, M. Hamada, N. Nagai, and M. Yamashina, "Compression/decompression DRAM for unified memory systems: a 16Mb, 200MHz, 90% to 50% graphics and width reduction prototype," in Digest of Technical Papers of IEEE International Solid-State Circuits Conference, 0-7803-4344-1, pp.342-343, San Francisco, USA, February, 2008. [IEEExplorer]
Choi, Y.K. and Wu, Z.Y. and Kim, K.M. and Lee, Y.H. and Cho, M.S. and Kim, H.S. and Lee, D.H. and Jung, W.G., "A Compact Low-Power CDAC Architecture for Mobile TFT-LCD Driver ICs," in IEEE International Solid-State Circuits Conference, 2008. ISSCC 2008. Digest of Technical Papers, 978-1-4244-2010-0, pp.176-605, February, 2008. [IEEExplorer]
Ruckmongathan, TN, "Low power by energy multiplexing in liquid crystal displays," in IDRC 08, Society for information display, 1083-1312, pp.63-66, January, 2008. [Link#1]
H. Singh, K. Agarwal, D. Sylvester, and K. J. Nowka, "Enhanced leakage reduction techniques using intermediate strength power gating," in IEEE Transactions on Very Large Scale Integration (VLSI) Systems, IEEE Educational Activities Department, 1063-8210, pp.1215-1224, November, 2007. [IEEExplorer][ACM Portal]
J. Kim and Y. Shin, "Minimizing leakage power in sequential circuits by using mixed vt flip-flops," in IEEE/ACM International Conference on Computer-Aided Design (ICCAD), IEEE Press, 978-1-4244-1382-9, pp.797-802, San Jose, USA, November, 2007. [IEEExplorer][ACM Portal]
Baker, M.A. and Shrivastava, A. and Chatha, K.S., "Smart driver for power reduction in next generation bistable electrophoretic display technology," in Proceedings of the 5th IEEE/ACM international conference on Hardware/software codesign and system synthesis, ACM, 978-1-59593-824-4, pp.197-202, Salzburg, Austria, September, 2007. [ACM Portal]
Min, J. and Cha, H., "Reducing display power in DVS-enabled handheld systems," in Proceedings of the 2007 international symposium on Low power electronics and design, ACM, 978-1-59593-709-4, pp.395-398, Portland, USA, August, 2007. [ACM Portal]
V. Khandelwal and A. Srivastava, "Leakage control through fine-grained placement and sizing of sleep transistors," in IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, IEEE Computer Society, 0-7803-8702-3, pp.1246-1255, July, 2007. [IEEExplorer][ACM Portal]
S. Chandra, K. Lahiri, A. Raghunathan, and S. Dey, "System-on-chip power management considering leakage power variations," in ACM/IEEE 44th Design Automation Conference (DAC-07), ACM, 978-1-59593-627-1, pp.877-882, San Diego, USA, June, 2007. [IEEExplorer][ACM Portal]
D.-S. Chiou, D.-C. Juan, Y.-T. Chen, and S.-C. Chang, "Fine-grained sleep transistor sizing algorithm for leakage power minimization," in ACM/IEEE 44th Design Automation Conference (DAC-07), ACM, 978-1-59593-627-1, pp.81-86, San Diego, USA, June, 2007. [IEEExplorer][ACM Portal]
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