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Total: 169
K. R. Heloue, N. Azizi, and F. N. Najm, "Modeling and estimation of full-chip leakage current considering within-die correlation," in ACM/IEEE 44th Design Automation Conference (DAC-07), ACM, 978-1-59593-627-1, pp.93-98, San Diego, USA, June, 2007. [IEEExplorer][ACM Portal]
A. Rastogi, W. Chen, and S. Kundu, "On estimating impact of loading effect on leakage current in sub-65nm scaled CMOS circuits based on newton-raphson method," in ACM/IEEE 44th Design Automation Conference (DAC-07), ACM, 978-1-59593-627-1, pp.712-715, San Diego, USA, June, 2007. [IEEExplorer][ACM Portal]
B. S. Gill, C. Papashristou, and F. G. Wolff, "A new asymmetric SRAM cell to reduce soft errors and leakage power in FPGA," in Design, Automation and Test in Europe (DATE-07), 978-3-9810801-2-4, pp.1460-1465, April, 2007. [IEEExplorer]
Woo, JH and Lee, JG and Chung, KY and Kang, WS and Kim, SC and Lee, GS and Kang, IS and Kim, BN, "Switch Controlled Source Amplifier for Low Power Mobile TFT-LCD Driver IC," in VLSI Design, Automation and Test, 2007. VLSI-DAT 2007. International Symposium on, 1-4244-0583-1, pp.1-2, April, 2007. [IEEExplorer]
Kim, H. and Cha, H. and Ha, R., "Dynamic refresh-rate scaling via frame buffer monitoring for power-aware LCD management," in Software: Practice and Experience, John Wiley & Sons, Inc., 0038-0644, pp.193-206, February, 2007. [ACM Portal]
A. Kumar and M. Anis, "Dual-threshold CAD framework for subthreshold leakage power aware FPGAs," in IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 0278-0070, pp.53-66, January, 2007. [IEEExplorer]
F. Gao and J. P. Hayes, "Exact and heuristic approaches to input vector control for leakage power reduction," in IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, IEEE Computer Society, 0-7803-8702-3, pp.2564-2571, November, 2006. [IEEExplorer][ACM Portal]
Gaurav Dhiman and Tajana Simunic Rosing, "Dynamic Power Management Using Machine Learning," in IEEE/ACM International Conference on Computer-Aided Design, ACM, 1-59593-389-1, pp.747-754, San Jose, USA, November, 2006. [IEEExplorer][ACM Portal]
D. Helms, G. Ehmen, and W. Nebel, "Analysis and modeling of subthreshold leakage of RT-components under PTV and state variation," in ACM/IEEE International Symposium on Low Power Electronics and Design, ACM, 1-59593-462-6, pp.220-225, Tegernsee, Germany, October, 2006. [IEEExplorer][ACM Portal]
S. Mukhopadhyay, K. Kim, C.-T. Chuang, and K. Roy, "Modeling and analysis of leakage currents in double-gate technologies," in IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 0278-0070, pp.2052-2061, October, 2006. [IEEExplorer]
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