ISPD 2009 Clock Network Synthesis Contest

[News and Announcements]. [Introduction]. [Schedule]. [Evaluation and Ranking]. [Input/Output Format]. [Evaluation Script]. [Join the Contest]. [Submission Guideline]. [Terms and Conditions]

News and Announcements


Continuing the tradition of spirited competition, the ISPD 2009 Steering Committee is pleased to announce a clock distribution network synthesis contest. Like the prior placement and routing contests, a set of benchmarks will be released; teams are invited to produce clock distribution network solutions, with the best results winning fame, recognition, and a grand prize.

Call for Participation

For the contest announcement and call for participation, please see pdf and txt.


Tool Evaluation and Ranking


The clock distribution network solutions will be evaluated on the following metrics:

Input/Output Format

We work hard to make sure the input/output format is as simple as possible. The detailed description of the input/output format can be found in this text file.

Small sample input/output files

Here are a sample input file and a sample output file of a simple 4-sink clock network synthesis problem, with illustrations. [Input], [Output], [Description(pdf)], [Explanation].

Evaluation Script

Join the Contest

If you are interested in participating in the contest, or even if you have any question, please feel free to send an email to Dr. Cliff Sze ( To ensure prompt response, please start with "ISPD2009-CTS" in the subject of your email.


Submission Guideline

Final submission time is set to (Mar 11) 11:59pm CST, which is in different time zone as, for example,
You can send me an http-link such that I can download your binary (or source files), scripts, clock network synthesis result files and a one-page algorithm description from the link. Please zipped or gtar all files.

Terms and Conditions


The contest is sponsored by IEEE CEDA.