|
Total: 99
J. Kim and Y. Shin, "Minimizing leakage power in sequential circuits by using mixed vt flip-flops," in IEEE/ACM International Conference on Computer-Aided Design (ICCAD), IEEE Press, 978-1-4244-1382-9, pp.797-802, San Jose, USA, November, 2007. [IEEExplorer][ACM Portal]
V. Khandelwal and A. Srivastava, "Leakage control through fine-grained placement and sizing of sleep transistors," in IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, IEEE Computer Society, 0-7803-8702-3, pp.1246-1255, July, 2007. [IEEExplorer][ACM Portal]
S. Chandra, K. Lahiri, A. Raghunathan, and S. Dey, "System-on-chip power management considering leakage power variations," in ACM/IEEE 44th Design Automation Conference (DAC-07), ACM, 978-1-59593-627-1, pp.877-882, San Diego, USA, June, 2007. [IEEExplorer][ACM Portal]
D.-S. Chiou, D.-C. Juan, Y.-T. Chen, and S.-C. Chang, "Fine-grained sleep transistor sizing algorithm for leakage power minimization," in ACM/IEEE 44th Design Automation Conference (DAC-07), ACM, 978-1-59593-627-1, pp.81-86, San Diego, USA, June, 2007. [IEEExplorer][ACM Portal]
K. R. Heloue, N. Azizi, and F. N. Najm, "Modeling and estimation of full-chip leakage current considering within-die correlation," in ACM/IEEE 44th Design Automation Conference (DAC-07), ACM, 978-1-59593-627-1, pp.93-98, San Diego, USA, June, 2007. [IEEExplorer][ACM Portal]
A. Rastogi, W. Chen, and S. Kundu, "On estimating impact of loading effect on leakage current in sub-65nm scaled CMOS circuits based on newton-raphson method," in ACM/IEEE 44th Design Automation Conference (DAC-07), ACM, 978-1-59593-627-1, pp.712-715, San Diego, USA, June, 2007. [IEEExplorer][ACM Portal]
B. S. Gill, C. Papashristou, and F. G. Wolff, "A new asymmetric SRAM cell to reduce soft errors and leakage power in FPGA," in Design, Automation and Test in Europe (DATE-07), 978-3-9810801-2-4, pp.1460-1465, April, 2007. [IEEExplorer]
A. Kumar and M. Anis, "Dual-threshold CAD framework for subthreshold leakage power aware FPGAs," in IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 0278-0070, pp.53-66, January, 2007. [IEEExplorer]
F. Gao and J. P. Hayes, "Exact and heuristic approaches to input vector control for leakage power reduction," in IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, IEEE Computer Society, 0-7803-8702-3, pp.2564-2571, November, 2006. [IEEExplorer][ACM Portal]
D. Helms, G. Ehmen, and W. Nebel, "Analysis and modeling of subthreshold leakage of RT-components under PTV and state variation," in ACM/IEEE International Symposium on Low Power Electronics and Design, ACM, 1-59593-462-6, pp.220-225, Tegernsee, Germany, October, 2006. [IEEExplorer][ACM Portal]
|
