======================================================================== SIGDA -- The Resource for EDA Professionals www.sigda.org ======================================================================== 15 June 2006 ACM/SIGDA E-NEWSLETTER Vol. 36, No. 12 Online archive: http://www.sigda.org/newsletter ======================================================================== Contents of this E-NEWSLETTER: (1) SIGDA News Contributing author: Tony Givargis Contributing author: Michael Orshansky Contributing author: Marc Riedel Contributing author: Igor Markov (2) Paper Submission Deadlines Hai Zhou (3) Upcoming Conferences and Symposia Hai Zhou (4) Upcoming Funding Opportunities Qinru Qiu (5) Call For Nominations 2006 ACM Outstanding Ph.D. Dissertation Award in EDA Radu Marculescu (6) SIGDA/DAC University Booth Sung Kyu Lim Raymond Hoare Alex Jones (7) Call For Nominations 2006 SIGDA Outstanding New Faculty Award Martin D.F. Wong (8) Call For Papers ACM Transactions on Design Automation of Electronic Systems Special Issue on Demonstrable Software Systems and Hardware Platforms Sung Kyu Lim ======================================================================== Dear ACM/SIGDA members, As always, we welcome your comments and suggestions. If you would like to participate or contribute to the content of the E-Newsletter, please feel free to contact any of us. Igor Markov and Qing Wu, E-Newsletter Editors; Qinru Qiu, E-Newsletter Associate Editor; Hai Zhou, E-Newsletter Associate Editor; Tony Givargis, E-Newsletter Associate Editor; Michael Orshansky, E-Newsletter Associate Editor; Marc Riedel, E-Newsletter Associate Editor; ======================================================================== SIGDA News ----------------------- "IMEC Makes Breakthrough With Metal Gates" http://www.eetimes.com/showArticle.jhtml?articleID=189401663 IMEC, a European R&D organization, reported several breakthroughs with nickel-based, fully-silicided (FUSI) metal gates, claiming that the technology is production-worthy for the 45-nm node. FUSI appears to be a disruptive technology. To eliminate the gate depletion effect and enhance transistor performance, metal gates are being introduced as a replacement for conventional polysilicon gates. Nickel-based FUSI has received growing attention for sub-45-nm CMOS applications. The technology eliminates poly depletion and is compatible with high-k dielectrics. It can be integrated in a conventional CMOS flow. "IBM and Georgia Tech Demonstrate Chips Running at 500GHz Near Absolute Zero" http://www.noticias.info/asp/aspComunicados.asp?nid=190707&src=0 The new IC is cryogenically cooled to 4.5K and runs at 500GHz. The chips used in the research are from a prototype fourth-generation SiGe technology fabricated by IBM on a 200-millimeter wafer. At room temperature, they operated at approximately 350 GHz. According to computer simulations, future devices promise speeds approaching 1.0 Tera Herz at room temperature. "For the first time, Georgia Tech and IBM have demonstrated that speeds of half a trillion cycles per second can be achieved in a commercial silicon-based technology, using large wafers and silicon-compatible low-cost manufacturing techniques," said John D. Cressler, Byers Professor in Georgia Tech.s School of Electrical and Computer Engineering, and a researcher in the Georgia Electronic Design Center (GEDC) at Georgia Tech. "This work redefines the upper bounds of what is possible using silicon-germanium nanotechnology techniques." "Intel Announces Tri-Gate Transistor" http://www.azonano.com/news.asp?newsID=2453 Intel researchers have disclosed they have developed new technology designed to further extend the company's leadership in energy-efficient performance. "Synthesis Contest Winners Offer New Algorithms" http://www.eetimes.com/showArticle.jhtml?articleID=188702906 Students from Michigan and Berkeley won a programming challenge at the International Workshop on Logic and Synthesis (IWLS) in Vail, Colorado on Wednesday (June 7). All competing entries were EDA tools that run natively on the OpenAccess database and use the OA Gear package developed at Cadence Berkeley Labs. Targeted towards academic researchers, OA Gear is an open- source toolkit that extends the utility of the OpenAccess database. Michigan students demonstrated a 100-fold speedup over the logic simulation engine released previously with the OA Gear package. They leveraged this simulator for fast combinational equivalence checking, and developed a metric for gauging similarity between two logic circuits for use in incremental verification. Berkeley students described equivalence checking algorithms to simplify circuits during bounded model checking. Their presentation suggested several improvements to OpenAccess and OA Gear, including more flexible interfaces, new features and new modules. "Intel's Future: Looking into the Crystal Ball" http://www.eetimes.com/showArticle.jhtml?articleID=188703330 Possibilities for Intel's ongoing business reorganization include selling the flash unit, reorganizing the Xscale business unit into an embedded division, giving up on Itanium and replacing it with multi-core X86 CPUs, and adopting a more flexible fab strategy to collaborate with foundry partness and share capacity requirements. "Researcher Learns How to Control Electron Flow in Semiconducting Nanowires" http://www.azonano.com/news.asp?newsID=2447 Jorden van Dam, researcher at the Kavli Institute of Nanoscience Delft, has succeeded in largely controlling the transportation of electrons in semiconductor nanowires. Van Dam moreover discovered how to observe a divergent type of supercurrent in these wires. Nanowires have superior electronic properties which in time could improve the quality of our electronics. On Tuesday, June 13, Van Dam will receive his PhD degree at Delft University of Technology based on this research. "Mentor Catapult SL: C++ into Hardware" http://www.eetimes.com/showArticle.jhtml?articleID=189400027 Mentor Graphics announced Catapult SL, extending the Catapult synthesis line introduced in 2004 that boasts 16 ASIC tape-outs, primarily for DSP applications. The new release is claimed to be the first high-level synthesis tool to create multiblock subsystems from pure ANSI C++. Catapult SL adds an ability to synthesize interblock channels and memory buffers automatically, thereby making it possible to optimize an entire signal-processing subsystem such as a baseband processor. The tool also adds a hierarchical synthesis engine, provides a carry-save adder optimization capability and offers links to power estimation tools. With Catapult SL, designers don't hard-code channels or interfaces. After providing pure ANSI C++ source code for the blocks, they use a graphical interface to input latency or throughput constraints. In addition to outputting SystemC models for high-speed simulation and verification, allowing what-if analysis, Catapult tools synthesize ANSI C++ into synthesizable RTL code. The tools allow interactive design exploration at every transformation. Catapult SL is available now, priced at $350,000, while other members of the Catapult family start at $140,000. "ESL Synthesis: Raising The Level of Abstraction Without Losing Touch With Reality" http://www.eetimes.com/showArticle.jhtml?articleID=188500009 Rishiyur Nikhil, a CTO of BlueSpec discusses replacements to the common thread-based hardware design style. He describes how Bluespec SystemVerilog (BSV) and ESL Synthesis Extensions (ESE) to SystemC formalize module composition, while supporting architectural exploration and refinement. "Microsoft Releases Fixes For 21 Vulnerabilities" http://computerworld.com/action/article.do?command=viewArticleBasic&articleId=9001163 Microsoft announced 21 vulnerabilities in several Microsoft products, including Internet Explorer (IE), Windows Media Player, Microsoft Outlook and PowerPoint. Eight of them were ranked "critical" by the company. One of the bulletins rated as critical described a cumulative upgrade for Internet Explorer that fixed 8 new flaws. The impact of the flaws included remote code execution, information disclosure and user spoofing. Today's announcement is "certainly one that people need to sit up and take notice of," said Michael Sutton, director of VeriSign Inc.'s iDefense Labs. He noted that most of the new critical flaws are on the client side, highlighting a continuing trend away from server-side security issues. "Advances in IC Optimization Accelerate Path to Design Closure" http://www.chipdesignmag.com/display.php?articleId=414 Why are more chips late to market and cost three times more to design at 90 nanometer (nm) than at 130 nm? Today's ASSPs and ASICs are huge, approaching one billion transistors, with clock speeds exceeding 1 GHz. Engineers struggle to manage the complexity of devices that achieve these levels of performance and size. "Inclusive Design and Verification Methodologies will Drive Next Generation SoCs" http://www.chipdesignmag.com/display.php?articleId=416 HDLs like VHDL and Verilog, HVLs like Vera, the newly IEEE ratified e, and system-level languages like SystemC all get a fair amount of attention in the press. The newest member to the group, SystemVerilog, gets more than its share. While the language discussions continue to stir debate, the reality is that each has areas of strength in the overall design and verification landscape. "Trusted ICs, Trusted Software" http://www.embedded.com/shared/printableArticle.jhtml?articleID=189400411 If you don't have enough to worry about, Eric Shufro sent a link to a Scientific American article about security threats embedded in DoD software written by overseas contractors. When a major defense system comprises millions of lines of code, how can one ensure that a bad guy hasn't slipped in a little bit of nastiness or a back door? I suspect a system like the missile defense shield is especially problematic as it's so hard to test. "Sun's SPOT, Squawk VM and Wireless Embedded Sensor Devices" http://www.embedded.com/shared/printableArticle.jhtml?articleID=188101293 At the 2006 Java One in San Francisco, Calif., in mid-May, Sun Microsystems revealed more details on a long-term wireless sensor effort it calls the Small Programmable Object Technology (SPOT) project. "Leakage Control Needs Multipronged Attack" http://www.eetasia.com/ARTP_8800421812_480100.HTM Controlling power, experts say, is like weight control_it requires a holistic approach. And the problem is rapidly getting worse, as transistors at 90nm and below show leakage levels at the gate that rival subthreshold leakage. Cadence Design Systems Inc. estimates that 90nm standard transistors are about 40 times leakier than the standard-voltage 130nm transistors. On the process front, technologists are working to improve nitroded oxides, even as they try to come up with a high-k dielectric that will get performance scaling back on track while keeping quantum tunneling under control. On the tool side, EDA vendors are developing power-optimized design methodologies that make it easier to use multiple voltage domains and other power-saving techniques. And, in architectures, computer scientists are figuring out how to limit power by dividing a processor's resources so that threads and micropartitions mete out only enough processor cycles to handle the task at hand. ======================================================================== Submission deadlines: --------------------- PDCS'06 - Int'l Conference on Parallel and Distributed Computing and Systems Dallas, TX Nov 13-15, 2006 Deadline: Jun 15, 2006 http://www.iasted.org/conferences/2006/Dallas/pdcs.htm ISOCC'06 - Int'l SoC Design Conference Seoul, Korea Oct 26-27, 2006 Deadline: Jun 30, 2006 http://www.isocc.org/ ProRISC'06 - Workshop on Signal Processing, Integrated Systems and Circuits Koningshof Veldhoven, Nederland Nov 23-24, 2006 Deadline: Jun 30, 2006 http://www.stw.nl/programmas/prorisc/ BIOCAS'06 - Biomedical Circuits and Systems Conference London, UK Nov 29-Dec 1, 2006 Deadline: Jul 3, 2006 http://www.ieeebiocas.org/ ASPDAC'07 - Asia and South Pacific Design Automation Conference Yokohama, Japan Jan 23-26, 2007 Deadline: Jul 10, 2006 http://www.aspdac.com/aspdac2007/ VLSI'07 - Int'l Conference on VLSI Design Bangalore, India Jan 6-10, 2007 Deadline: Jul 14, 2007 http://www.vlsiconference.com/2007/ ISLPED'06 - Int'l Low Power Design Contest Tegernsee, Germany Oct 4 - 6, 2006 Deadline: Jul 31, 2006 http://www.islped.org/contest.html DATE'07 - Design Automation and Test in Europe Nice, France Apr 16-20, 2007 Deadline: Sep 10, 2006 http://www.date-conference.com/ NOCS'07 - Int'l Symposium on Networks-on-Chips Princeton, New Jersey May 7-9, 2007 Deadline: Dec 1, 2006 http://www.nocsymposium.org/ IP-SOC'06 - IP Based SoC Design Grenoble, France Dec 6-7, 2006 Deadline: Sep 25, 2006 http://www.us.design-reuse.com/ipsoc2006/ ======================================================================== Upcoming symposia, conferences and workshops: --------------------------------------------- AHS'06 - Conference on Adaptive Hardware and Systems Istanbul, Turkey Jun 16-18, 2006 http://ehw.jpl.nasa.gov/events/ahs2006/ ISCA'06 - Int'l Symposium on Computer Architecture Boston, MA Jun 17-21, 2006 http://www.ece.neu.edu/conf/isca2006/ DAC'06 - Design Automation Conference San Francisco, CA Jul 24-28, 2006 http://www.dac.com/ DAC'06 - SIGDA Ph.D. Forum at DAC San Francisco, CA Jul 25, 2006 http://www.sigda.org/daforum/ EUC'06 - Int'l Conference on Embedded And Ubiquitous Computing Seoul, Korea Aug 1-4, 2006 http://euc06.euc-conference.org/ MWSCAS'06 - Int'l Midwest Symposium on Circuits and Systems San Juan, Puerto Rico Aug 6-9, 2006 http://mwscas06.ece.uprm.edu/ EC'06 - Int'l Workshop on Embedded Computing Columbus, OH August 14, 2006 http://juliet.stfx.ca/~lyang/icpp06-ec/ ASAP'06 - Int'l Conference on Application-specific Systems, Architectures and Processors Steamboat Springs, CO Sep 11-13, 2006 http://asap2006.grm.polymtl.ca/ ISOCC'06 - Int'l SoC Design Conference Seoul, Korea Oct 26-27, 2006 http://www.isocc.org/ ICCAD'06 - Int'l Conference on Computer-Aided Design San Jose, CA Nov 5-9, 2006 http://www.iccad.com/ PDCS'06 - Int'l Conference on Parallel and Distributed Computing and Systems Dallas, TX Nov 13-15, 2006 http://www.iasted.org/conferences/2006/Dallas/pdcs.htm VLSI'07 - Int'l Conference on VLSI Design Bangalore, India Jan 6-10, 2007 http://www.vlsiconference.com/2007/ ASPDAC'07 - Asia and South Pacific Design Automation Conference Yokohama, Japan Jan 23-26, 2007 http://www.aspdac.com/aspdac2007/ ======================================================================== Upcoming funding opportunities ------------------------------- DOD Enabling Technologies for Modeling and Simulation (BAA-03-12-IFKA) Deadline: September 30, 2008 http://www.fbo.gov/spg/USAF/AFMC/AFRLRRS/BAA-03-12-IFKA/Modification%2005.ht ml Threat System Validation Support Deadline: July 10, 2006 http://fedbizopps.cos.com/cgi-bin/getRec?id=20060525a5 Joint National Training Capability Broad Agency Announcement Deadline: May 14, 2009 http://www.ntsc.navy.mil/Ebusiness/BusOps/Acquisitions/Index.cfm?RND=220990 BAA for Simulation and Training Technology R&D Deadline: Continuous until December 31, 2010 http://www.ntsc.navy.mil/EBusiness/BusOps/Acquisitions/Index.cfm?RND=868451 Optoelectronics: Components and Information Processing Deadline: Continuous http://www.afosr.af.mil/ResearchPrograms/optoelectronics.htm Software and Systems Deadline: Continuous http://www.afosr.af.mil/ResearchPrograms/software_and_systems.htm Information Fusion and Artificial Intelligence Deadline: Continuous http://www.afosr.af.mil/ResearchPrograms/information_fusion.htm Computational Mathematics Deadline: Continuous http://www.afosr.af.mil/ResearchPrograms/computational_mathematics.htm Electronics Design for Cold Environments (CRREL-66) Deadline: Continuous http://www.mvk.usace.army.mil/contract/docs/FY2006BAA1.pdf Sensors, Sensor Systems, Data Acquisition, Processing, and Transmission Systems (ITL-6) Deadline: Continuous http://www.mvk.usace.army.mil/contract/docs/FY2006BAA1.pdf High Performance Computing (HPC) and Networking (ITL-4) Deadline: Continuous http://www.mvk.usace.army.mil/contract/docs/FY2006BAA1.pdf NSF Instrument Development for Biological Research (IDBR) (NSF 06-570) Deadline: August 25, 2006 http://www.nsf.gov/pubs/2006/nsf06570/nsf06570.htm Operations Research (OR) Deadline: September 1, 2006 http://www.nsf.gov/funding/pgm_summ.jsp?pims_id=13341&org=NSF&from=fund Information and Intelligent Systems: Advancing Human-Centered Computing, Information Integration and Informatics, and Robust Intelligence (NSF 06-572) Full Proposal Deadline(s): October 19, 2006 for Large Projects November 02, 2006 for Medium Projects December 06, 2006 for Small Projects http://www.nsf.gov/pubs/2006/nsf06572/nsf06572.htm Partnerships for Innovation (NSF 06-550) Letter of Intent Deadline Date: June 28, 2006 Full Proposal Deadline Date: August 30, 2006 http://www.nsf.gov/funding/pgm_summ.jsp?pims_id=5261&org=CISE&from=home DARPA TRUST for Integrated Circuits (BAA06-40) Original Response Date: Aug 11, 2006 http://www.darpa.mil/baa/baa06-40.html Cognitive Information Processing Technology (BAA02-21) Deadline: June 5, 2007 http://www.darpa.mil/ipto/Solicitations/open/02-21_PIP.htm Advanced Soldier Sensor Information System and Technology Deadline: August 04, 2006 http://fedbizopps.cos.com/cgi-bin/eps/spg/ODA/DARPA/CMO/BAA04-38/listing.htm l?notice=MOD NASA Applied Information Systems Research Deadline: January 30, 2007 http://nspires.nasaprs.com/external/solicitations/summary.do?method=init&sol Id={0B64DB41-8F7D-C949-44CD-9D04A484B653}&path=open DOE Solid-State Lighting Core Technologies Deadline: June 27, 2006 https://e-center.doe.gov/iips/faopor.nsf/3b3cff0a4a1f243485256ec100490e1a/3d 84c25df7cf18428525716c006d1004?OpenDocument Fellowship Sloan Research Fellowships Deadline: September 15, 2006 http://www.sloan.org/programs/scitech_fellowships.shtml ======================================================================== Call For Nominations --------------------------- 2006 ACM Outstanding Ph.D. Dissertation Award in EDA http://www.sigda.org/opda.html Submission Deadline: Aug 15, 2006 Award Description: Design automation has gained widespread acceptance by the VLSI circuits and systems design community. Advancement in computer-aided design (CAD) methodologies, algorithms, and tools has become increasingly important to cope with the rapidly growing design complexity, higher performance requirements, and shorter time-to-market demands. To encourage innovative, ground-breaking research in the area of electronic design automation, the ACM's Special Interest Group on Design Automation (SIGDA) has established an ACM award to be given each year to an outstanding Ph.D. dissertation that makes the most substantial contribution to the theory and/or application in the field of electronic design automation. The award consists of a certificate and a check for $1,000 and will be presented at the 2006 International Conference on Computer Aided Design in San Jose, California. The award will be selected by a committee of experts from academia and industry in the field and appointed by ACM in consultation with the SIGDA Chair. Nomination Requirements and Procedure: * Each department of any university may nominate at most one Ph.D. dissertation whose final submission date is between July 1, 2005 and June 30, 2006. * Each nomination package must be postmarked by Aug. 15 and should consist of: 1. Five copies of the dissertation 2. A statement from the nominee, up to three pages in length, which explains the significance and major contributions of the work 3. A nomination letter from nominee's department chair or dean of the school endorsing the application 4. Up to three additional letters of recommendation from experts in the field. These letters may be included in the package or sent separately to the address below. Item 1 must be submitted in (preferably bound) hard copy form. Other items may be submitted as paper printouts or electronically. All the nomination materials should be mailed to: Prof. Radu Marculescu Attn: ACM Outstanding Ph.D. Dissertation Award in EDA Carnegie Mellon University Department of Electrical & Computer Engineering 5000 Forbes Ave. Pittsburgh, PA 15213-3890 Tel: (412) 268-8710 Fax: (412) 268-3204 Email: radum@ece.cmu.edu ======================================================================== SIGDA/DAC University Booth ------------------------------ The SIGDA/DAC University Booth provides an opportunity for the university community to demonstrate EDA tools, design projects, and instructional materials at the Design Automation Conference. The University Booth also provides space for the presentation of EDA vendor literature and programs of interest to the university community. The University Booth provides booth space, poster areas, computers, printers, and a high-speed connection to the Internet for participating universities. The SIGDA/DAC University Booth is sponsored by ACM/SIGDA, EDAC, and the Design Automation Conference, and organized and run by SIGDA volunteers. Interested university groups are encouraged to apply via our on-line registration site (http://www.sigda.org/ubooth.html), which typically opens 3 months before Design Automation Conference. This year we are pleased to announce a special issue of ACM TODAES on the Demonstrable Software Systems and Hardware Platforms. Submissions are encouraged from the technical papers that describe the works presented at the SIGDA/DAC University Booth in San Francisco, 2006. We are interested in research works that are dedicated to prototype software systems and/or experimental hardware platforms that offer a significant innovation in tackling today's important problems. We require that the practical aspects of the software tool or hardware platform development should be accompanied by new and substantive algorithmic and/or theoretic enhancements. For more information, please visit ACM TODAES website (http://www.acm.org/todaes). Coordinators Raymond Hoare University of Pittsburgh Email: hoare@engr.pitt.edu Alex Jones University of Pittsburgh Email: akjones@ece.pitt.edu SIGDA Advisory Board Sung Kyu Lim Georgia Institute of Technology Email: limsk@ece.gatech.edu ======================================================================== Call For Nominations ------------------------ 2006 SIGDA Outstanding New Faculty Award Deadline: August 15, 2006 SUMMARY The SIGDA Outstanding New Faculty Award recognizes a junior faculty member early in her or his academic career who demonstrates outstanding potential as an educator and/or researcher in the field of electronic design automation. While prior research and/or teaching accomplishments are important, the selection committee will especially consider the impact that the candidate has had on her or his department and on the EDA field during the initial years of their academic appointment. The award is presented annually at ICCAD, and currently consists of a $1,000 award to the faculty member, along with a citation. ELIGIBILITY Outstanding new faculty who are developing academic careers in areas in or related to electronic design automation are encouraged to apply for this award. Note that this award is not intended for senior or highly experienced investigators who have already established independent research careers, even if they are new to academia. Candidates must have recently completed at least one full academic year and no more than four full academic years in a tenure-track position. Applications will also be considered from people whose appointments are continuing (non-visiting) positions with substantial educational responsibilities regardless whether or not they are tenure track. Persons holding research-only positions are not eligible. Exceptions to the timing requirements will be made for persons who have interrupted their academic careers for substantive reasons, such as family or medical leave. The presence of such reasons must be attested by the sponsoring institution, but no explanation is needed. APPLICATION Candidates applying for the award must submit the following to the selection committee no later than August 15, 2006: (1) a 2-page statement summarizing the candidate's teaching and research accomplishments since beginning their current academic position, as well as an indication of plans for further development over the next five years; (2) a copy of a current curriculum vitae; (3) a letter from either the candidate's department chair or dean endorsing the application. Application packets (preferably as email attachments in pdf) should be sent to: Professor Martin D.F. Wong University of Illinois at Urbana-Champaign Department of Electrical and Computer Engineering 1308 W. Main St., 409 CSL Urbana, IL 61801 email: mdfwong@uiuc.edu phone: 217-244-1729 fax: 217-244-1946 ======================================================================== Call For Papers -------------------- ACM Transactions on Design Automation of Electronic Systems Special Issue on Demonstrable Software Systems and Hardware Platforms This year we are pleased to announce a special issue of ACM TODAES on the Demonstrable Software Systems and Hardware Platforms. We are interested in research works that are dedicated to prototype software systems and/or experimental hardware platforms that offer a significant innovation in tackling today's important problems. Good examples include a power minimization software tool using MTCMOS, a dynamic thermal management tool for a high-performance microprocessor, a best-of-breed placement tool, a new nano-device simulator, etc. We require that the practical aspects of the software tool or hardware platform development should be accompanied by new and substantive algorithmic and/or theoretic enhancements. Submissions are encouraged from the technical papers that describe the works presented at the SIGDA/DAC University Booth in San Francisco, 2006. The submission may be based on the works that were published in previous refereed conferences such as DAC and ICCAD. However, specific preference will be given to the expanded manuscripts based on the technical papers and Student Design Contest papers at DAC 2006. If the submission is an expanded version of a DAC or other archival workshop/conference paper, it should have at least 30% new material, and the authors should state clearly how the submission differs from and/or expands on the workshop/conference paper. Please submit your paper to http://mc.manuscriptcentral.com/acm in the TODAES section. Also, please write "SPECIAL ISSUE ON DEMONSTRABLE SOFTWARE SYSTEMS AND HARDWARE PLATFORMS" on your cover page and in the notes section of the Web site submission form. We expect a shorter turnaround time for this special issue. About the SIGDA/DAC University Booth: The SIGDA/DAC University Booth has been providing an opportunity for the university community to demonstrate EDA tools, design projects, and instructional materials at the Design Automation Conference since 1987. The University Booth also provides space for the presentation of EDA vendor literature and programs of interest to the university community. The University Booth provides booth space, poster areas, computers, printers, and a high-speed connection to the Internet for participating universities. The SIGDA/DAC University Booth also provides travel grants to the participating students to cover the transportation and lodging expense. Interested university groups are encouraged to apply via our on-line registration site (http://www.sigda.org/ubooth.html), which typically opens 3 months before Design Automation Conference. Important Dates Submission Deadline: 8/31/06 Acceptance Notice: 2/28/07 Final Manuscript Due: 3/31/07 Guest Editors Massoud Pedram, USC (pedram@ceng.usc.edu) Sung Kyu Lim, Gerogia Tech (limsk@ece.gatech.edu) ======================================================================== (This ACM/SIGDA E-NEWSLETTER is being sent to all persons on the ACM/SIGDA mailing list. To manage your subscription, go to "Subscriber's corner" on http://listserv.acm.org/ - you need to login using the email address where this newsletter is delivered. First time users will be required to choose a password.) ======================================================================== Notice to Authors By submitting your contributions to ACM SIGDA, you acknowledge that they contain only your own work (minor edits by others are allowed) and are not subject to third-party licenses and copyrights. The contents of the ACM SIGDA newsletters are released by SIGDA into Public Domain, except when explicitly noted otherwise. SIGDA newsletters are routinely reproduced on the SIGDA Web site and the ACM Digital Library, may be reproduced in printed publications and appear on the Wikipedia Web site --- without express notice and royalties. If you wish to restrict the distribution of your work or retain copyright for your contribution, please contact the editors. Last revised by I. Markov - 05/21/06 ========================================================================